Two Paths for Charge to Escape
Enterprise 3D TLC encodes three bits into eight threshold-voltage states, leaving only a few hundred millivolts between adjacent levels. Charge escapes along two paths: trap-assisted leakage through the tunnel oxide, and read disturb from the elevated wordline voltage applied during reads. The first accumulates with time and temperature, the second with read count. Together they shift and broaden the threshold distributions, and once the overlap exceeds what ECC can correct, it surfaces directly as UBER degradation. Holding the UBER target of no more than 1 sector per 10^18 bits read is not about one heroic correction step — it is about keeping the distributions inside the correctable window at all times.
Every Cycle Shortens the Retention Window
Traps left in the oxide by program/erase cycling do not fully anneal out, so an end-of-life block retains data for far less time than a fresh one. That is why endurance and retention have to be discussed together: the planned 1 DWPD of the J750 and 3 DWPD of the J770 burn cycles at very different rates, and the UBER target across a five-year warranty is constrained by both. These are product-definition/EVT stage target values, and the media binning policy has to iterate alongside characterisation data. In implementation, firmware bins blocks by accumulated cycle count and applies more conservative refresh thresholds and stronger correction settings to heavily cycled blocks.
Soft Information, Not a Timer
Background refresh is not a scheduled sweep. Firmware continuously samples per-block raw bit error rate and optimal read-voltage offset. When the offset crosses a threshold, the first response is read retry and voltage recalibration to pull the distributions back. Only when error rate keeps climbing after recalibration does the block enter the rewrite queue. Power-on adds a special case: a drive stored unpowered for a long period has no way to know how much time or thermal exposure elapsed, so it must rebuild that judgement through denser sampling on first access before deciding whether broad recalibration is warranted.
Refresh Writes Belong in the Endurance Budget
Every refresh is a real write drawing on endurance the host never sees. Cold-heavy workloads are the sensitive case. The Q7 J760Q and J760QD target object storage, backup and archive, where data sits untouched after it is written. The Q9 J960Q and J960QD target AI checkpointing and very large capacity arrays, where historical checkpoint versions also stay resident for long periods. Under either profile, refresh rather than garbage collection can become the dominant contributor to write amplification. The workable trade-off is to keep refresh granularity fine, rewriting only the blocks holding pages that genuinely degraded, to schedule refresh windows into host idle periods, and to expose refresh-induced write volume separately through telemetry so capacity and lifetime planning can see that overhead.