Changing Form Factor Changes Three Things
E3.S and U.2 differ by far more than outline dimensions. E3.S belongs to the EDSFF family, with a thinner body and a different connector definition that lets more bays sit side by side across a 1U front panel. Airflow between drives takes a shorter, straighter path, so surface temperature is lower at the same fan output. Backplane routing also suits the Gen5 signal budget better because the connector pinout has been reorganised. These three are linked: once density rises, any shortfall in cooling turns the extra bays into more frequent throttling rather than more throughput.
The Gen5 Bottleneck Is Often the Power Ceiling
PCIe 5.0 x4 doubles interface bandwidth, and the dynamic power of the controller and PHY rises with it. The 15mm U.2 form factor was defined around a power envelope that was already tight, so stacking more performance on top reaches the thermal limit sooner. E3.S offers a more generous power ceiling and a better heat path, which is precisely why OCP has pushed it in the Gen5 generation. Put differently, the value of E3.S is not novelty — it is that the controller can hold a high operating point instead of throttling to stay alive.
E1.S Is Not a Small E3.S
The two target different machine types. E1.S is narrower and thinner, suiting high-density nodes that win on count, with correspondingly lower per-drive power and capacity ceilings. E3.S is thicker and accommodates more NAND packages and a stronger controller. The FLEX 9 series plans both: J100E and J130E in E3.S, J100S and J130S in E1.S. They arrive in pairs but are not one physical design trimmed down — power delivery, thermal path and board layout each have to converge independently.
The Switching Cost Lands on the Chassis
The vast majority of installed servers still use U.2/U.3 backplanes, so adopting EDSFF means adopting a new machine. TITAN 9's J960 and J980 therefore stay on U.2/U.3 and advance in parallel with FLEX 9: the same Gen5 performance generation, two form factor tracks, with the customer's chassis refresh cadence deciding which applies. Both tracks are at the product-definition/EVT stage, targeting 2026 Q4 to 2027 Q1.